1. Field of the Invention
This invention relates to a protective device for a semiconductor integrated circuit. More particularly, it relates to a device for protecting a semiconductor integrated circuit from the destruction phenomena caused by a high voltage applied to the input terminal of the semiconductor integrated circuit.
2. Description of the Prior Art
Conventionally, at the input stage of a semiconductor integrated circuit, a protective MIS (metal-insulator semiconductor) transistor is provided to protect the input transistor in an internal integrated circuit (hereinafter referred to as an internal IC) from a high voltage input caused by static electricity. The protective MIS transistor has a gate oxidation film thicker than that in the internal IC so that the protective MIS transistor does not operate under a normal operating voltage and operates only when a high voltage is applied. The diffusion region, that is, the drain region of the MIS transistor, is extended so as to have a resistance region which also protects the internal IC from a high voltage. At the end of the resistance region, the diffusion region is directly and electrically in contact with an input electrode wiring layer.
In such a conventional structure, however, since the diffusion region directly contacts the input electrode wiring layer, the tolerance voltage at the input electrode is relatively low. That is, when a high voltage of, for example, 200 V is applied to the input electrode wiring layer, the electrode metal and the diffusion region contacting the electrode metal generates an excessive alloy which easily penetrates through the diffusion region and short circuits the semiconductor substrate with the diffusion region. As a result, the internal IC cannot be driven even when a normal signal voltage is applied to the input electrode wiring layer because the input signal is directly conducted to the semiconductor substrate. Also, due to the presence of the resistance region in the diffusion region, the diffusion region in the protective MOS transistor is large. Further, the junction capacitance between the contact portion of the diffusion region and the semiconductor substrate causes the input impedance of the internal IC to be large so that the operating speed of the semiconductor integrated circuit is deteriorated.